1. Field of the Invention
The present invention relates to a test element group (TEG) made from a plurality of testing elements for evaluating the characteristics of a thin film transistor (TFT). Further, the present invention relates to a method of manufacturing the TEG, to a method of testing the electrical characteristics of a semiconductor device by using the TEG, and to a semiconductor device tested by using the TEG.
2. Description of the Related Art
Techniques of forming thin film transistors (TFTs) by using semiconductor films (thickness on the order of several nm to several hundreds of nm) formed on a substrate having an insulating surface have been in the spotlight in recent years. The reason for this is the increase in demand for active matrix semiconductor display devices as one type of semiconductor device. Active matrix semiconductor display devices typically include liquid crystal displays, OLED (organic light emitting device) displays, DMDs (digital micro-mirror devices), and the like.
A high mobility can be obtained for TFTs (crystalline TFTs) that use semiconductor films having a crystalline structure as an active layer, and therefore it is possible to realize an active matrix semiconductor display device for performing display of a high definition image by the integration of functional circuits on the same substrate.
The crystalline TFTs are completed through a variety of manufacturing processes. Processes typically have a formation of a base film in order to prevent impurities within a substrate from incurring to a semiconductor film, a formation and crystallization of the semiconductor film, patterning of the semiconductor film, a formation of a gate insulating film, a formation of source/drain regions by adding impurities that impart a conductivity to the semiconductor film, a formation of a gate electrode, and a formation of electrodes connected to the source/drain regions as main processes.
The TFT characteristics such as on current, mobility, S-value, threshold value, and off current differ in some cases due to accidental causes, such as the impurity concentration within the apparatus at the time of manufacture, and the conduction of manufacturing apparatus, even if the same apparatus is used for the aforementioned manufacturing processes under the same conditions. In the worst case, a defect will develop in one of the aforementioned processes, and there will be significant deterioration in the TFT characteristics.
It is therefore very important to control the TFT characteristics of display panels at an early stage, before product manufacturing is complete, in order to reduce costs. Manufacturing conditions can be reexamined, and separate processes can be added for improving the TFT characteristics, provided that the TFT characteristics are controlled at an early state. Further, if the TFT characteristics have deteriorated significantly and the display panel is judged not usable as a manufactured product, then subsequent processing steps relating to that panel can be omitted, and an yield can be improved.
Testing of the TFT characteristics during the TFT manufacturing processes is generally performed using a TEG. TEGs are separate and independent elements used exclusively for evaluation. The element characteristics can be examined in more detail by using a TEG, and in addition, destructive testing by high stress application, which is impossible to perform on an actual display panel, can be performed with a TEG.
Further, it is possible to search for optimal conditions during manufacturing processes for TFTs used as a panel (actual panel TFTs) by examining the characteristics of TFTs manufactured under various conditions.
As discussed above, the feedback of evaluations obtained by testing the TEG to the manufacturing process of actual panel TFTs, is an extremely effective means when seen from the point of view of cost reduction.
However, the TFTs used for the TEG are generally manufactured by nearly the same processes as used for actual panel TFTs. It is therefore necessary to complete the actual panel TFTs as well as the TFTs for TEG, to a level at which their characteristics can be tested, in order to evaluate the characteristics of the actual panel TFTs by using the TEG.
Accordingly, the TFT characteristics cannot be tested until the actual panel TFTs are complete, and the time and costs for the panel manufacturing processes cannot be reduced, if some type of defect develops during crystallization of the semiconductor film, for example.
Furthermore, it is vital to have immediate feedback of the TEG testing results to the actual panel manufacturing process also for cases in which the optimal conditions for the actual panel manufacturing process are being sought by examining the characteristics of TEGs manufactured under various manufacturing conditions.